In the paper a new hardware architecture for the implementation of a high-speed, low bit-rate image coding system is outlined. Our proposed algorithm is based on the Cellular Neural/Nonlinear Network (CNN) chip-set. A simple and fast method is introduced to generate basis functions of 2 dimensional (2D) orthogonal transformations. Using these 2D basis functions of the Hadamard or Cosine functions, the transformation coefficients of the basic blocks of the image are measured by the CNN. Meanwhile, the CNN can produce the inverse transformation of the measured coefficients and the actual distortion-rate can be computed. If a required distortion-rate is reached, the coding process could be stopped (the use of even more coefficients would increase bit-rate needlessly). Effects of noise and VLSI computing accuracy are also considered to optimise the architecture.
Hardware architecture and operational scheme of the CNN-based coding/decoding system. The CNN is the basic processor to measure the coefficients of the orthogonal transformation, while it calculates the inverse transformation as well. Error-rate and bit-rate are measured in-flight, as the coefficients of the spatial frequencies are estimated sequentially.